calculadora básica

 library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.NUMERIC_STD.ALL;

USE IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following library declaration if using

-- arithmetic functions with Signed or Unsigned values

--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating

-- any Xilinx primitives in this code.

--library UNISIM;

--use UNISIM.VComponents.all;

entity CALCULADORA is

    Port ( x : in  STD_LOGIC_VECTOR(4 downTO 0);

           y : in  STD_LOGIC_VECTOR(4 downTO 0);

           SALIDA : out  STD_LOGIC_VECTOR(4 downTO 0);

           OPCION : in  STD_LOGIC_VECTOR(3 downTO 0);

           CARRY : out  STD_LOGIC);

end CALCULADORA;

architecture Behavioral of CALCULADORA is

signal resultado : std_logic_vector (4 downto 0);

signal Temporal  : std_logic_vector (5 downto 0);

begin

 process(x,y,OPCION)

   begin

case (OPCION) is 

    when "0001" => resultado  <= std_logic_vector(unsigned(x)+unsigned(y));

when "0010" => resultado  <= std_logic_vector(unsigned(x)-unsigned(y));

when "0011" => resultado  <= std_logic_vector(to_unsigned(to_integer(unsigned(x))*to_integer(unsigned(y)),5));

       when "0100" => resultado  <= std_logic_vector(to_unsigned(to_integer(unsigned(x))/to_integer(unsigned(y)),5));

       when others => resultado  <= std_logic_vector(unsigned(x)+unsigned(y));

 

end case;

       end process;

SALIDA <= resultado;

Temporal <=std_logic_vector (unsigned ('0' & x ) + unsigned ('0' & y));

CARRY <= Temporal (4);

end Behavioral;